Ed Sperling is the Editor in Chief at Semiconductor Engineering. He specializes in covering themes related to technology, software, artificial intelligence, and deep tech, with a focus on topics such as AI platforms, CPUs, and edge computing. Ed's insights and expertise have been featured in prominent discussions within the semiconductor industry.
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Ed Sperling's coverage is heavily focused on providing expert commentary and industry-specific insights into the engineering and design aspects of electronics, integrated circuits, chip design, data centers, and the semiconductor industry. He appears to be interested in addressing challenges and advancements within these domains.
Given his focus on expert commentary, Ed might be open to pitches from professionals who have deep technical knowledge or experience in areas such as 3D heterogeneous integration, DRAM technology complexities, power integrity challenges in next-gen designs, SerDes technologies for data centers, ESD mitigation strategies and reliability testing using deep data analysis.
As Ed does not specify a geographic focus but covers topics that are globally relevant within the semiconductor industry and related fields of engineering and design.
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Worldwide EDA and semiconductor IP revenue reached $5.748 billion in Q1 2026, a 12.7% increase compared to the same period in 2025.
Moving from large language models in the cloud to small language models at the edge is much more complicated than just slimming down the algorithms.
By: Ed Sperling
Where AI will be successful, who will benefit, and how that will affect the design process?
More data, more processing elements, and more memories are making it much harder to maintain consistent throughput in a multi-die assembly.
Jobs, markets, and economics are undergoing dramatic changes, but it's still too early to know how this will all shake out.
The use of AI agents in chip design has been limited to small portions of the design flow.
AI has access to every known security paper and powerful tools, but that's not all bad.
Chips are getting bigger, more modular, and much more capable as new innovations mix with existing processes and long-researched projects go mainstream.
The rapid build-out of AI on the edge marks a fundamental shift in where intelligence is located, how much is included in devices, and the speed at
Hot Chips 2026: Thinner dies, more TSV area, thermal dissipation, and limited manufacturing capacity make HBM scaling much more difficult.
